Building a supercomputer from game console components

Wayne Luk from Imperial College London will talk on "A Heterogeneous Cluster with FPGAs and GPUs" at the ANU, 14 December 2009. GPUs (Graphics Processing Units) are used to offload complex image processing from the main processor in PCs and games consoles. FPGAs (Field Programmable Gate Arrays) are more flexible devices which can be reconfigured for custom applicators. These cips have become popular as a way to design low cost specalised supercomputers. But no one is exactly sure of the best design for such a supercomputer. Thus the need for research to find out how. Apart from research these systems have applicaiton in predicting climate change and cracking encryption codes.

                   Seminar Announcement
           School of Computer Science, CECS
            The Australian National University

Date:  Monday, December 14, 2009
Time:  11:00 am to 12:00 noon
Venue: Room R214, Ian Ross Building [31]

Speaker: Wayne Luk

Title:   A Heterogeneous Cluster with FPGAs and GPUs

Abstract:

 This talk describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field Programmable Gate Arrays) and GPUs  (Graphics Processing Units). A Map-Reduce framework for the Axel cluster is presented which exploits spatial and temporal locality through different types of processing elements and communication channels. The Axel system enables experiments involving FPGAs, GPUs and CPUs running collaboratively for applications in high-performance computing, such as N-body simulation.

Biography:

 Wayne Luk is Professor of Computer Engineering at Imperial College London. He was a Visiting Professor at Stanford University. His research interests include theory and practice of customizing hardware and software for specific application domains, such as multimedia, financial simulation, and biomedical computing. He is a fellow of the IEEE and the BCS.

From: "A Heterogeneous Cluster with FPGAs and GPUs", ANU, 2009